1. Field
Example embodiments relate to a memory device and/or a method of manufacturing the memory device. For example, example embodiments relate to a memory device retaining its data even when power is removed and/or a method of manufacturing the memory device.
2. Description of Related Art
In general, semiconductor memory devices may be classified as either volatile memory devices or non-volatile memory devices. Examples of volatile memory devices may include dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices. The data input speed and/or data output speed of the volatile memory device may be relatively faster. However, data stored in the volatile memory device may not be retained when power is removed.
An example of a non-volatile memory device may be a read only memory (ROM) device such as an electrically erasable programmable read only memory (EEPROM) device. Flash memory devices, a type of EEPROM device, have enjoyed widespread use. Data input speed and/or data output speed of a flash memory device may be relatively slower. However, a flash memory device may retain its data even though power is removed.
In order to program and/or erase data, the flash memory device may employ Fowler-Nordheim tunneling or hot electron injection. Flash memory devices may generally be classified as either floating gate type flash memory devices or silicon-oxide-nitride-oxide-semiconductor (SONOS) type flash memory devices.
A method for improving integrity of a semiconductor device has been widely researched. As one example, a conventional non-volatile memory device may have one control gate and two floating gates. As another example, a conventional 2-bit non-volatile semiconductor memory cell may include two diffusion regions formed at a substrate, a channel region formed between the diffusion regions, and/or an oxide-nitride-oxide (ONO) layer.
In accordance with the latter example above, the ONO layer may include a first oxide layer, a nitride layer and/or a second oxide layer. The nitride layer may have a thickness of less than about 100 Å. The nitride layer may have two charge storing regions.
However, the integrity of the semiconductor device may still be required to be improved. Particularly, in the above examples, a storage density of data of the non-volatile memory device may be improved by varying a structure of the nitride or using the nitride layer as a data storing layer. However, the floating gate and the nitride layer may be horizontally formed. Accordingly, it may be difficult to reduce a size of the non-volatile memory device efficiently.
In order to overcome the above problems, a method of manufacturing a non-volatile memory device has been developed. In the method, a channel layer may be vertically formed and/or an ONO layer may be formed on a sidewall of the channel layer. However, an etching process employed to vertically form the channel layer may cause damage to the channel layer.
A space between the channel layers may be filled with a dielectric material having a relatively large dielectric constant. Accordingly, a coupling effect that degrades operating characteristics of the non-volatile memory device may be generated between the channel layers.